Implementation of image stabilization algorithm on a programmable logic integral circuit
DOI:
https://doi.org/10.52575/2687-0932-2022-49-1-187-194Keywords:
image stabilization, relative frame shift, programmable logic integrated circuit, Haar wavelet, Sobel operatorAbstract
This article discusses the implementation of an image stabilization algorithm based on the sum of absolute differences (SAD) between areas of adjacent frames. The relative and absolute displacement between frames is found for the minimum time interval between areas of interest. Information processing is carried out in parallel in 16 streams to minimize the delay time, and an alternative version of the algorithm is proposed using the Haar wavelet and the Sobel operator, which improves the main characteristics of the algorithm and reduces the effect of image noise and optical distortion. Increasing the number of free cycles of the algorithm allows you to increase the size of the substrate and the size of the target, which increases the stability of the algorithm. An assessment of the required resources for the possibility of running the developed algorithm on a programmable logic integrated circuit (FPGA) has been implemented on Cyclone V. The article shows the functional blocks and the main functions of the algorithm execution.
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